11th International Symposium on Automated Technology for Verification and Analysis
October 15 - 18, 2013, Hanoi, Vietnam
In many practical application domains, the software is organized into a set of threads, whose activation is exclusive and controlled by a cooperative scheduling policy: threads execute, without any interruption, until they either terminate or yield the control explicitly to the scheduler.
The formal verification of such software poses significant challenges. On the one side, each thread may have infinite state space, that might require some abstraction. On the other side, the scheduling policy is often important for correctness, and an approach based on abstracting the scheduler may result in loss of precision and false positives. Unfortunately, the translation of the problem into a purely sequential software model checking problem turns out to be highly inefficient for the available technologies.
We discuss a software model checking technique that exploits the intrinsic structure of these programs. Each thread is translated into a separate sequential program and explored symbolically with lazy abstraction, while the overall verification is orchestrated by the direct execution of the scheduler. The approach is optimized by filtering the exploration of the scheduler with the integration of partial-order reduction. The technique, called ESST (Explicit Scheduler, Symbolic Threads) has been implemented and experimentally evaluated on a significant set of benchmarks. The results demonstrate that ESST technique is way more effective than software model checking applied to the sequentialized programs, and that partial-order reduction can lead to further performance improvements.
Probabilistic model checking is an automated technique to verify whether a probabilistic system, e.g. a distributed network protocol which can exhibit failures, satisfies a temporal logic property, for example, the minimum probability of the network recovering from a fault in a given time period is above 0.98. One can also generate, given a model and a temporal property, a strategy for controlling the system in order to achieve or optimise the property, but this aspect has received less attention to date. In this paper, we give an overview of methods for automated verification and strategy synthesis, focusing on Markov decision process models and temporal logics PCTL and LTL. We also describe how to apply multi-objective model checking to investigate trade-offs between the properties. We illustrate these techniques by means of several case studies analysed in the PRISM model checker. The paper concludes with a summary of future challenges in this area.
The reachability problem for Petri nets is a central problem of net theory. The problem is known to be decidable by inductive invariants definable in the Presburger arithmetic. When the reachability set is definable in the Presburger arithmetic, the existence of such an inductive invariant is immediate. However, in this case, the computation of a Presburger formula denoting the reachability set is an open problem. Recently this problem got closed by proving that if the reachability set of a Petri net is definable in the Presburger arithmetic, then the Petri net is flatable, i.e. its reachability set can be obtained by runs labeled by words in a bounded language. As a direct consequence, classical algorithms based on acceleration techniques effectively compute a formula in the Presburger arithmetic denoting the reachability set. In this presentation, the framework of verification of infinite-state systems based on acceleration techniques is recalled. We also explain the completeness of this method on the computation of Presburger formulas denoting the reachability sets of Petri nets.
Hybrid automata are a widely used framework to model complex critical systems, where continuous physical dynamics are combined with discrete transitions. Application areas include automotive, railway, aerospace, and industrial production. The expressive power of Satisfiability Modulo Theories (SMT) solvers can be used to symbolically model networks of hybrid automata, using formulas in the theory of reals. In this tutorial, we survey the state-of-the-art in SMT-based verification for hybrid systems. We show how SAT-based techniques such as bounded model checking, k-induction, predicate abstraction, and IC3, can be naturally lifted to the SMT case. The expressive power of the SMT framework allows us to exploit a local time semantics, where the timescales of the automata in the network are synchronized upon shared events. The approach fully leverages the advanced features of modern SMT solvers, such as incrementality, unsatisfiable core extraction, and interpolation. We then concentrate on the problem of scenario-based verification, i.e. checking if a network of hybrid automata accepts some desired interactions among the components, expressed as Message Sequence Charts (MSCs). We conclude by investigating the problem of requirements analysis for hybrid systems.
Probabilistic model checking is an automated method for establishing the correctness of probabilistic system models against temporal logic specifications. The techniques have been implemented in the probabilistic model checker PRISM (www.prismmodelchecker.org) and applied to analyse and detect flaws in several real-world systems, across a wide range of application domains. In this tutorial, we give a brief overview of probabilistic model checking, focusing on the model of Markov decision processes, and briefly summarise recent developments of the tool, including parametric models, multi-objective model checking, strategy generation and verification for stochastic games.
Systems equipped with counters are central when modeling distributed protocols, programs with recursive parallel threads, programs with pointers, broadcast protocols, databases, etc. When it comes to model-checking counter systems and their variants, the main results are that verification is undecidable when zero-tests are allowed, while several problems can be decided when zero-tests are forbidden—one speaks of VASS, for "vector addition systems with states", or equivalently "Petri nets". In the case of Petri net, reachability was shown decidable in 1982 and the reachability problem for Petri net and related decidable problems on subclasses of counter systems are pivot problems not only for the verification of infinite-state systems but also for problems appearing in very active research areas related to various logics and automata for data words/trees. Hence, the design of efficient algorithms for the reachability problem for VASS may have a great impact, not only in the realm of formal verification. It is however a very difficult problem. Therefore, improving the computational cost for solving the reachability problem for Petri nets would also improve the complexity of the formal verification of numerous classes of infinite-state systems.
Strikingly, the decision algorithm for Petri net reachability has never been implemented. This is because of its high complexity, both conceptual (the algorithm is very hard to understand and to describe) and computational (it is assumed that the complexity of the algorithm is not primitive-recursive). The general problem is known to be decidable by algorithms exclusively based on the classical Kosaraju-Lambert-Mayr-Sacerdote-Tenney decomposition (KLMTS decomposition). Recently from this decomposition, we deduced that a final configuration is not reachable from an initial one if and only if there exists a Presburger inductive invariant that contains the initial configuration but not the final one. Since we can decide if a Presburger formula denotes an inductive invariant, we deduce from this result that there exist checkable certificates of non-reachability in the Presburger arithmetic. In particular, there exists a simple algorithm for deciding the general Petri net reachability problem based on two semi-algorithms. A first one that tries to prove the reachability by enumerating finite sequences of actions and a second one that tries to prove the non-reachability by enumerating Presburger formulas. In this presentation we provide a simple proof of the Petri net reachability problem that is not based on the KLMST decomposition. The proof is based on the notion of production relations, inspired from Hauschildt, that directly proves the existence of Presburger inductive invariants.
Venue of tutorials is not the same as venue of the main conference and the distance between them is about 10 km (6 mi). It is recommended to take taxi to the venue of tutorials (and around Hanoi). During rush hours taxi is not allowed in some streets, so the journey can be longer. It costs 5-10 USD and takes 30-60 minutes. Reliable taxi companies we recommended are Hanoi Taxi: +84 4 3853 5353, Taxi CP: +84 4 3826 2626, and Mai Linh Taxi +84 4 3861 6161.
You can use this map (PDF, PNG) to find the meeting room E3-212 at VNU Campus.
Day 1: Tuesday, 15 October, 2013, TutorialTutorial Venue: VNU Campus, Building E3, 144 Xuan Thuy, Hanoi |
|
8:30 - 9:00 |
Registration |
9:00 - 10:30 |
Tutorial 1: SMT-based verification of Hybrid Systems, by Alessandro Cimatti, slides Chair: Bow-Yaw Wang |
10:30 - 11:00 |
Coffee Break |
11:00 - 12:30 |
Tutorial 2: Reachability Problem for Petri Nets, by Jerome Leroux, slides Chair: Mizuhito Ogawa |
12:30 - 14:00 |
Lunch Break, see map for restaurants |
14:00 - 15:30 |
Tutorial 3: Probabilistic model checking with PRISM: overview and recent developments, by Marta Kwiatkowska, slides Chair: Dang Van Hung |
Day 2: Wednesday, 16 October, 2013, Theory |
|
8:00 - 8:20 |
Registration |
8:20 - 8:30 |
Opening: Nguyen Ngoc Binh |
8:30 - 9:30 |
Keynote: Acceleration For Petri Nets. Jerome Leroux. slides Chair: Mizuhito Owaga |
9:30 - 9:50 |
Coffee Break |
9:50 - 12:10 |
Omega Automata and LTL, Chair: Yasuhiko Minamide |
Regular |
Effective Translation of LTL to Deterministic Rabin Automata: Beyond the (F,G)-Fragment Tommás Babiak, Frantisek Blahoudek, Mojmír Kretínský, and Jan Strejcek |
Improved upper and lower bounds for Büchi Disambiguation Hrishikesh Karmarkar, Manas Joglekar, and Supratik Chakraborty |
|
Tool |
Rabinizer 2: Small Deterministic Automata for LTL\GU Jan Kretínsky and Ruslán Ledesma Garza |
Manipulating LTL formulas using Spot 1.0 Alexandre Duret-Lutz |
|
LTL Model Checking with Neco Lukasz Fronc and Alexandre Duret-Lutz |
|
Solving Parity Games on the GPU Michael Luttenberger and Philipp Hoffmann |
|
12:10 - 13:30 |
Lunch Break at Sunway Hotel Hanoi, 19 Pham Dinh Ho Street, view walking map |
13:30 - 15:40 |
Timed Systems, Chair: Thanh-Tho Quan |
Regular |
Time-Bounded Reachability for Monotonic Hybrid Automata: Complexity and Fixed Points Thomas Brihaye, Laurent Doyen, Gilles Geeraerts, Joel Ouaknine, Jean-Francois Raskin and James Worrell |
An Automatic Technique for Checking the Simulation of Timed Systems Elie Fares, Jean-Paul Bodeveix, Mamoun Filali-Amine and Manuel Garnacho |
|
Synthesis of Bounded Integer Parameters for Parametric Timed Reachability Games Aleksandra Jovanovic, Didier Lime and Olivier H. Roux |
|
Tool |
PyEcdar: Towards Open Source Implementation for Timed Systems Axel Legay and Louis-Marie Traonouez |
CCMC: A Conditional CSL Model Checker for Continuous-Time Markov Chains Yang Gao, Ernst Moritz Hahn, Naijun Zhan and Lijun Zhang |
|
15:40 - 16:00 |
Coffee Break |
16:00 - 17:50 |
Quantitative Properties, Chair: Shoji Yuen |
Regular |
Kleene Algebras and Semimodules for Energy Problems Zoltan Esik, Uli Fahrenberg, Axel Legay and Karin Quaas |
Looking at Mean-Payoff and Total-Payoff through Windows Krishnendu Chatterjee, Laurent Doyen, Mickael Randour and Jean-Francois Raskin |
|
Weighted Safety Sigal Weiner, Orna Kupferman, Matan Hasson, Eyal Pery and Zohar Shevach |
|
Tool |
NLTOOLBOX: A Library for Reachability Computation of Nonlinear Dynamical Systems Romain Testylier and Thao Dang |
18:00 - 20:30 |
Reception, at Sunway Hotel Hanoi, 19 Pham Dinh Ho Street, view walking map |
Day 3: Thursday, 17 October, 2013, Software Engineering |
|
8:30 - 9:30 |
Keynote: Automated Verification and Strategy Synthesis for Probabilistic Systems. Marta Kwiatkowska and David Parker. slides Chair: Dang Van Hung |
9:30 - 9:50 |
Coffee Break |
9:50 - 12:00 |
Software Verification, Specification and Analysis, Chair: Andreas Podelski |
Regular |
A Framework for Ranking Vacuity Results Shoham Ben-David and Orna Kupferman |
Synthesizing Masking Fault-Tolerant Systems from Deontic Specications Ramiro Demasi, Pablo Castro, Thomas S.E. Maibaum and Nazareno Aguirre |
|
Verification of a Dynamic Management Protocol for Cloud Applications Rim Abid, Gwen Salaun, Francesco Bongiovanni and Noel De Palma |
|
Short |
SAT Based Verification of Network Data Planes Shuyuan Zhang and Sharad Malik |
A Theory for Control-Flow Graph Exploration Stephan Arlt, Philipp Rümmer and Martin Schäf |
|
12:00 - 13:40 |
Lunch Break at Press Club, 9 Ly Dao Thanh Street, view walking map |
13:40 - 15:40 |
Tools and Techniques for Software Engineering, Chair: Ngoc-Hung Pham |
Regular |
Compact Symbolic Execution Jiri Slaby, Jan Strejcek and Marek Trtík |
Multi-threaded Explicit State Space Exploration with State Reconstruction Sami Evangelista, Lars Kristensen and Laure Petrucci |
|
Tool |
CELL: A Compositional Verification Framework Kun Ji, Yang Liu, Shang-Wei Lin, Jun Sun, Jin Song Dong and Truong Khanh Nguyen |
VCS: A Verifier for Component-Based Systems Fei He, Liangze Yin, Bow-Yaw Wang, Lianyi Zhang, Guanyu Mu and Wenrui Meng |
|
SmacC: A Retargetable Symbolic Execution Engine Armin Biere, Jens Knoop, Laura Kovács, and Jakob Zwirchmayr |
|
15:40 - 16:00 |
Coffee Break |
16:00 - 18:00 |
Program Analysis, Chair: Olivier Roux |
Regular |
Verification of Heap Manipulating Programs with Ordered Data by Extended Forest Automata Parosh Abdulla, Lukas Holik, Bengt Jonsson, Ondrej Lengal, Cong Quy Trinh and Tomas Vojnar |
Integrating Policy Iterations in Abstract Interpreters Pierre Roux and Pierre-Loïc Garoche |
|
Interpolation Properties and SAT-based Model Checking Arie Gurfinkel, Simone Fulvio Rollini, and Natasha Sharygina |
|
Short |
The Quest for Precision: A Layered Approach for Data Race Detection in Static Analysis Jakob Mund, Ralf Huuck, Ansgar Fehnker and Cyrille Artho |
Day 4: Friday, 18 October, 2013, Formal Devices |
|
8:30 - 9:30 |
Keynote: SMT-based Software Model Checking. Alessandro Cimatti. slides Chair: Bow-Yaw Wang |
9:30 - 9:50 |
Coffee Break |
9:50 - 12:00 |
Concurrent Programs, Chair: Oded Maler |
Regular |
Analysis of Message Passing Programs using SMT-Solvers Parosh Aziz Abdulla, Mohamed Faouzi Atig and Jonathan Cederberg |
An Expressive Framework for Verifying Deadlock Freedom Duy-Khanh Le, Wei-Ngan Chin and Yong-Meng Teo |
|
Expected Termination Time in BPA Games Dominik Wojtczak |
|
Tool |
MoTraS: A Tool for Modal Transition Systems and Their Extensions Jan Kretínský and Salomon Sickert |
Cunf: a Tool for Unfolding and Verifying Petri Nets with Read Arcs Cesar Rodriguez and Stefan Schwoon |
|
12:00 - 13:40 |
Lunch Break at Sunway Hotel Hanoi, 19 Pham Dinh Ho Street, view walking map |
13:40 - 15:40 |
Time/Cost Analysis, Chair: Hoang Truong |
Regular |
Precise Cost Analysis via Local Reasoning Diego Esteban Alonso-Blas, Puri Arenas and Samir Genaim |
Control Flow Refinement and Symbolic Computation of Average Case Bound Hong Yi Chen, Supratik Mukhopadhyay and Zheng Lu |
|
Termination and Cost Analysis of Loops with Concurrent Interleavings Elvira Albert, Antonio Flores-Montoya, Samir Genaim and Enrique Martin-Martin |
|
Linear Ranking for Linear Lasso Programs Matthias Heizmann, Jochen Hoenicke, Jan Leike and Andreas Podelski |
|
15:40 - 16:00 |
Coffee Break |
16:00 - 18:00 |
Parameterized System and Formal Languages, Chair: Hiroyuki Seki |
Regular |
Merge and Conquer: State Merging in Parametric Timed Automata Étienne André, Laurent Fribourg and Romain Soulat |
An Automata-Theoretic Approach for Reasoning About Parameterized Systems and Specifications Sarai Sheinvald, Orna Grumberg and Orna Kupferman |
|
Pushdown Systems with Stack Manipulation Yuya Uezato and Yasuhiko Minamide |
|
Robustness Analysis of String Transducers Roopsha Samanta, Jyotirmoy Deshmukh and Swarat Chaudhuri |
|
18:00 - 18:30 |
Business meeting and ATVA 2014 announcement Bow-Yaw Wang and Ralf Huuck |
18:30 - 21:30 |
Banquet, Buffet at Sen Tay Ho Restaurant, address: 614 Lac Long Quan Street, view bus route |
Stephan Arlt, Philipp Rümmer and Martin Schäf |
A Theory for Control-Flow Graph Exploration |
Tomáš Babiak, František Blahoudek, Mojmir Kretinsky and Jan Strejcek |
Effective Translation of LTL to Deterministic Rabin Automata: Beyond the (F,G)-Fragment |
Kun Ji, Yang Liu, Shang-Wei Lin, Jun Sun, Jin Song Dong and Truong Khanh Nguyen |
CELL: A Compositional Verification Framework |
Multi-threaded Explicit State Space Exploration with State Reconstruction |
|
Thomas Brihaye, Laurent Doyen, Gilles Geeraerts, Joel Ouaknine, Jean-Francois Raskin and James Worrell |
Time-Bounded Reachability for Monotonic Hybrid Automata: Complexity and Fixed Points |
An Expressive Framework for Verifying Deadlock Freedom |
|
Ralf Huuck, Cyrille Valentin Artho, Ansgar Fehnker and Jakob Mund |
The Quest for Precision: A Layered Approach for Data Race Detection in Static Analysis |
Pierre Roux and Pierre-Loic Garoche |
Integrating Policy Iterations in Abstract Interpreters |
Rim Abid, Gwen Salaun, Francesco Bongiovanni and Noel De Palma |
Verification of a Dynamic Management Protocol for Cloud Applications |
Krishnendu Chatterjee, Laurent Doyen, Mickael Randour and Jean-Francois Raskin |
Looking at Mean-Payoff and Total-Payoff through Windows |
PyEcdar: towards open source implementation for timed systems |
|
Elie Fares, Jean-Paul Bodeveix and Mamoun Filali-Amine |
An Automatic Technique for Checking the Simulation of Timed Systems |
Michael Luttenberger and Philipp Hoffmann |
Solving Parity Games on the GPU |
SmacC: A Retargetable Symbolic Execution Engine |
|
Fei He, Liangze Yin, Bow-Yaw Wang, Lianyi Zhang, Guanyu Mu and Wenrui Meng |
VCS: A Verifier for Component-Based Systems |
Jan Kretinsky and Salomon Sickert |
MoTraS: A Tool for Modal Transition Systems and Their Extensions |
Manipulating LTL formulas using Spot 1 . 0 |
|
Shuyuan Zhang and Sharad Malik |
SAT Based Verification of Network Data Planes |
Zoltan Esik, Uli Fahrenberg, Axel Legay and Karin Quaas |
Kleene Algebras and Semimodules for Energy Problems |
Robustness Analysis of String Transducers |
|
Yang Gao, Ernst Moritz Hahn, Naijun Zhan and Lijun Zhang |
A CSL Model Checker for Continuous-Time Markov Chains |
Yuya Uezato and Yasuhiko Minamide |
Pushdown Systems with Stack Manipulation |
Elvira Albert, Antonio Flores-Montoya, Samir Genaim and Enrique Martin-Martin |
Termination and Cost Analysis of Loops with Concurrent Interleavings |
Aleksandra Jovanovic, Didier Lime and Olivier H Roux |
Synthesis of Bounded Integer Parameters for Parametric Timed Reachability Games |
Lukasz Fronc and Alexandre Duret-Lutz |
LTL Model Checking with Neco |
Jan Kretinsky and Ruslan Ledesma Garza |
Rabinizer 2: Small Deterministic Automata for LTL\GU |
An Automata-Theoretic Approach for Reasoning About Parameterized Systems and Specifications |
|
Merge and Conquer: State Merging in Parametric Timed Automata |
|
Parosh Abdulla, Lukas Holik, Bengt Jonsson, Ondrej Lengal, Cong Quy Trinh and Tomas Vojnar |
Verification of Heap Manipulating Programs with Ordered Data by Extended Forest Automata |
Parosh Aziz Abdulla, Mohamed Faouzi Atig and Jonathan Cederberg |
Analysis of Message Passing Programs using SMT-Solvers |
Interpolation Properties and SAT-based Model Checking |
|
A Framework for Ranking Vacuity Results |
|
Diego Esteban Alonso-Blas, Puri Arenas and Samir Genaim |
Precise Cost Analysis via Local Reasoning |
Cesar Rodriguez and Stefan Schwoon |
Cunf: a Tool for Unfolding and Verifying Petri Nets with Read arcs |
Sigal Weiner, Orna Kupferman, Matan Hasson, Eyal Pery and Zohar Shevach |
Weighted Safety |
Matthias Heizmann, Jochen Hoenicke, Jan Leike and Andreas Podelski |
Linear Ranking for Linear Lasso Programs |
Ramiro Demasi, Pablo Castro, Tom Maibaum and Nazareno Aguirre |
Synthesizing Masking Fault-Tolerant Systems From Deontic Specifications |
Supratik Mukhopadhyay, Hong Yi Chen and Zheng Lu |
Control Flow Refinement and Symbolic Computation of Average Case Bound |
Manas Joglekar, Hrishikesh Karmarkar and Supratik Chakraborty |
Improved upper and lower bounds for Buechi Disambiguation |
Jiri Slaby, Jan Strejcek and Marek Trtík |
Compact Symbolic Execution |
Romain Testylier and Thao Dang |
NLTOOLBOX: A library for reachability computation of nonlinear dynamical systems |
Expected termination time in BPA games |